This comprehensive course is designed to equip engineers with the skills and knowledge in advance Standard Cell Development and as a continuing course after Introduction to Standard Cell Layout course. This course thoroughly introduces digital design, focusing on CMOS logic circuits, layout techniques, and verification processes for medium and complex cells. Participants will gain hands-on experience in planar technology, and various layout and verification exercises in working with standard cells development and optimization.
By the end of this course, participants will be able to: