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Top Block Design Training

Course Description:

The course focuses on hierarchical layout implementation, addressing density, top block floorplanning, top block routing and integration, top block verification, and mitigation of reliability issues in top block hierarchies. Both courses would utilize Synopsys Custom Compiler or Cadence Layout XL for layout implementation.

Learning Objectives

By the end of this course, participants will be able to:

  • Learning Schematic Hierarchies and their Implementation in Layout
  • Understanding and Resolving Density Issues
  • Top Block Floorplanning
  • Top Block Routing and Integration
  • Mitigating Reliability Issues in Top Blocks
  • Implement top-block level layout from floorplanning to routing and integration, and then to verification
    • Execute the implementation of top blocks with varying levels of complexity
    • Execute the implementation of top blocks in at least two different technologies

Course Outline

  • Module 1: Top Block Floorplanning
  • Module 2: Top Block Routing
  • Module 3: Mitigating Reliability Issues in Top Blocks

Tools/Software Tools Used in this Training

  • Google Skywater

Instructor-led / Online

Pre-Requisites:

  • Introduction to Block Design Layout
  • Block Design Layout : Reliability Issues at Sub-Block Level

Target Learners

  • BSECE - Microelectronics / BSCpE
  • Microelectronics enthusiast

Instructor

MJ Malubay
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